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Palo Alto Networks Certified Network Security Engineer (PCNSE) · Palo Alto Networks
Select one answer.
Written by other learners. Comments can disagree with the marked answer — check the official documentation when in doubt.
I'll give you a hint, it's a system-wide setting, not interface level...
After configuring, if the following error "GMX0_TX0_INT_REG[UNDFLW]TX Underflow" is returned when doing a commit, there may be a speed/duplex negotiation mismatch between the PAN management port and the switch port to which it connects.
C is the correct answer here.